Makefile how to use logical OR between prerequisites?-CodePudding

My source files are organized nicely in a folder, that contains subfolders, that also contains source files.
The subfolders don't branch any further.
All object files are just meant to be created and stored in the same folder.

I don't want to manually list the name of the subdirs in the prerequisites when writing the target that generates my object files:

Right now this works:

$(OBJ)/%.o: $(SRC)/%.c
    $(CC) -c $< -o $@ $(CFLAGS)

$(OBJ)/%.o: $(SRC)/$(subdir1)/%.c
    $(CC) -c $< -o $@ $(CFLAGS)

$(OBJ)/%.o: $(SRC)/$(subdir2)/%.c
    $(CC) -c $< -o $@ $(CFLAGS)

...

But I want it to look something like this:

$(OBJ)/%.o: $(SRC)/%.c OR $(SRC)/*/%.c
    $(CC) -c $< -o $@ $(CFLAGS)

I understand that the title most likely isn't the real question to be asked, but I'm looking for any solution. Also, I know that the * doesn't work as a placeholder here.

CodePudding user response：

First, you can simplify the makefile you have by using vpath:

$(OBJ)/%.o: %.c
    $(CC) -c $< -o $@ $(CFLAGS)

vpath %.c $(SRC) $(SRC)/$(subdir1) $(SRC)/$(subdir2)

Then, if you really don't want to specify the subdirectories:

vpath %.c $(shell find $(SRC) -type d)