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So as long as 8088, 8031 8-bit data bus CPU does not require memory alignment32-bit appeared after problem, CPU and memory data bus, the location of the 32-bit bus can only start from 4 n start 4-trichlorobenzene bytes read 1, 64 bus starts read 1 8 n position,2,4,8 bytes, this will cause the unaligned data needs to be read twice, such as the 32-bit data stored in the 1, 2, 3, 4, although is a CPU instructions but need two bus cycles to read, read for the first time 4 bytes,1,2,3 [0], the second reading (4, 7) bytes, then Mosaic [1, 2, 3, 4] is passed to the CPU,
Memory alignment is optimized data storage location, as far as possible from 4 n, 8 n the location of the store, including simple data alignment, and complex struct, the alignment of the object
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Baidu search/f greatly architects a daily topicCodePudding user response:
The first: the first address of the first members of 0Article 2: each member of the first address is integer times their own size
Article 3: the structure of the overall alignment,