I have two versions of code for project A, and project A is written based on project B. I need to modify a Makefile to compile project A based on versions of project B. For example:

And I have version of project B in an environment variable.

> echo $VERSION_B
> 1.0

The file directory layout:

> tree /tmp
> .
├── a3
│   ├── a3.c
│   ├── a3.o
├── a4
│   ├── a4.c
│   ├── a4.o
├── a6
│   ├── a6.c
│   ├── a6.o
├── helper.c
├── helper.o
└── Makefile

The Makefile looks like:

MODULE_big = A

OBJS = a3.o a3.o helper.o
...

Looks like I need to change OBJS based on $VERSION_B. I thought I can do something like:

MODULE_big = A

all: 
    ifeq ("1.0", $(VERSION_B))
        OBJS = a3/a3.c a3/a3.o helper.o
    else
        ifeq ("2.0",  $(VERSION_B))
            OBJS = a4/a4.c a4/a4.o helper.o
        else
            OBJS = a6/a6.c a6/a6.o helper.o

But it doesn't work. Is it possible to choose the file path of project A based on project B version in Makefile?

CodePudding user response：

I recommend using constructed macro names, like this:

OBJS_1.0 = a3/a3.c a3/a3.o helper.o
OBJS_2.0 = a4/a4.c a4/a4.o helper.o
OBJS_3.0 = a6/a6.c a6/a6.o helper.o

OBJS := $(OBJS_$(VERSION_B))

CodePudding user response：

Try:

MODULE_big = A

ifeq ("1.0", $(VERSION_B))
    OBJS = a3/a3.c a3/a3.o helper.o
else
    ifeq ("2.0",  $(VERSION_B))
        OBJS = a4/a4.c a4/a4.o helper.o
    else
        OBJS = a6/a6.c a6/a6.o helper.o
    endif
endif

all: $(OBJS)
    $(CC) $(CFLAGS) $(OBJS) -o program