# include "DSP2833x_Device. H"//Device Headerfile
# include "DSP2833x_Examples. H"//Examples include File

# include "math. H"
Interrupt void epwm1_isr (void);

Void InitEPwm1Example (void);
Void Gpio_Setup (void);

Int I, k=0;
Float M=0.8;//modulation ratio
Int N=400;//sampling points
Float sina [400];
Float sinb [400].
Void main (void)
{
InitSysCtrl ();//initializes the system control
InitEPwm1Gpio ();
Gpio_Setup ();//function, Gpio port Settings

for(k=0; k{
Sina [k]=sin (2 * 3.1416 * k/N);
Sinb [k]=sin (2 * 3.1416 * k/N);
}
EINT;//close the interrupt
InitPieCtrl ();//initialize the interrupt control
PieCtrlRegs. PIEIER1. Bit. INTx1=1;
XIntruptRegs. XINT1CR. Bit. ENABLE=1;
IER=0 x0000;
IFR=0 x0000;
InitPieVectTable ();//initialize the interrupt vector table

EALLOW;//This is men to write to EALLOW protected registers
PieVectTable. EPWM1_INT=& amp; Epwm1_isr;
EDIS.

EALLOW;
SysCtrlRegs. PCLKCR0. Bit. TBCLKSYNC=0;//configure ePWM s first, then buy 1
EDIS.

InitEPwm1Example ();

EALLOW;
SysCtrlRegs. PCLKCR0. Bit. TBCLKSYNC=1;//after a comment
EDIS.

IER |=M_INT3;

//Enable EPWM INTn in the PIE: Group 3 interrupt 1-3
PieCtrlRegs. PIEIER3. Bit. INTx1=1;

//Enable global Interrupts and who priority real - time debug events:
EINT;//Enable Global interrupt INTM
ERTM;//Enable Global realtime interrupt DBGM

For (;; )
{
NOP __asm (" ");
}

}

Void Gpio_Setup (void)
{
EALLOW;
GpioCtrlRegs. GPAMUX1. Bit. GPIO0=1;//GPIO0 configured to ePWM1A function
GpioCtrlRegs. GPAMUX1. Bit. GPIO1=1;//GPIO1 is configured to ePWM1B function
EDIS.
}

Void InitEPwm1Example (void) {
//Setup TBCLK
EPwm1Regs. TBPRD=25000;//mode for 3 KHZ, increase or decrease to calculate
EPwm1Regs. TBPHS. Half. TBPHS=0;//Phase is 0
EPwm1Regs. TBCTR=0;//time base counter reset
EPwm1Regs. TBCTL. Bit. CTRMODE=TB_COUNT_UPDOWN;
EPwm1Regs. TBCTL. Bit. PHSEN=TB_DISABLE;//Disable phase loading
EPwm1Regs. TBCTL. Bit. HSPCLKDIV=TB_DIV1;//Clock thewire to SYSCLKOUT
EPwm1Regs. TBCTL. Bit. CLKDIV=TB_DIV1;

//Setup shadowing
EPwm1Regs. CMPCTL. Bit. SHDWAMODE=CC_SHADOW;
EPwm1Regs. CMPCTL. Bit. SHDWBMODE=CC_SHADOW;
EPwm1Regs. CMPCTL. Bit. LOADAMODE=CC_CTR_ZERO;//CTR=Zero CMPA load from shadow register
EPwm1Regs. CMPCTL. Bit. LOADBMODE=CC_CTR_ZERO;//CTR=Zero CMPB load from shadow register

//Set the actions
EPwm1Regs. AQCTLA. Bit. CAU=AQ_CLEAR;//the Clear PWM1A on the event A, up count
EPwm1Regs. AQCTLA. Bit. CAD=AQ_SET;//Set PWM1A on the event A, down the count
EPwm1Regs. AQCTLB. Bit. CBU=AQ_CLEAR;//the Clear PWM1B on event B, up the count
EPwm1Regs. AQCTLB. Bit.=AQ_SET CBD;//Set PWM1B on event B, down the count

//Interrupt the where we will change the Compare Values
EPwm1Regs. ETSEL. Bit. INTSEL=ET_CTR_PRD;//Select INT on PRD event
EPwm1Regs. ETSEL. Bit. INTEN=1;//Enable INT
EPwm1Regs. ETPS. Bit. INTPRD=ET_1ST;//the Generate INT on 1 st event

EPwm1Regs. CMPA. Half. CMPA=0;//give the initial value of the
}

Interrupt void epwm1_isr (void)
{
EPwm1Regs. CMPA. Half. CMPA=((1.0 + M * sina [I])/2.0);//EPwm1Regs TBPRD * (1.0 + M * sina [I])/2.0);
EPwm1Regs. CMPB=((1.0 + M * sinb [I])/2.0);//EPwm1Regs TBPRD * (1.0 + M * sinb [I])/2.0);
i++;
If (i>=N)
{
I=0;
}
EPwm1Regs. ETCLR. Bit. INT=1;//write 1 to ETFLG (INT) status flag bits reset for the next interruption
PieCtrlRegs. PIEACK. All=PIEACK_GROUP3;
}