Home > Blockchain >  Systemverilog: assignment between unpacked arrays of different order (downto vs. upto)
Systemverilog: assignment between unpacked arrays of different order (downto vs. upto)

Time:12-01

Assuming two (edit: unpacked) arrays of int are defind with different index ordering (downto vs. upto) but the same size, like

int  a [10:1];
int  b [1:10];

would an assignment between these,

assign b = a;
  1. be illegal, or
  2. result in a "same index" assignment (b[1]=a[1] ... b[10]=a[10]), or
  3. result in a "mirrored index" assignment (b[1]=a[10] ... b[10]=a[1])?

I have not been able to find information in the language reference manual, and two commercial tools are behaving differently.

CodePudding user response:

This is legal code and you are showing an unpacked array, not a packed array. However either way, the range goes from left to right. So your option 3 is the correct behavior. See section 6.22.2 Equivalent types and 7.6 Array assignments in the IEEE 1800-2017 SystemVerilog LRM

  • Related