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IA32 Assembly: splitting address into its components

Time:11-24

I'm having trouble splitting a stored address into its components (namely into the tag bits, set index bits, and block offset bits). I'm trying to implement the function...

unsigned char check_cache(line cache[4], unsigned char addr);

This function will check whether the given cache stores the data at the given memory address. If the cache stores the data at the given memory address (i.e., cache hit), this function will return the stored data. Otherwise (i.e., cache miss), this function will return 0xFF. Here's some of the C code...

typedef struct {
        char valid;
        char tag;
        char block[4];
} line;

unsigned char check_cache(line cache[4], unsigned char addr);
  • The cache is directed-mapped (E=1), with a 4-byte block size (B=4) and four sets (S=4).

I need to store the given memory address in a byte-sized register and then split the address into three components (tag bits, set index bits, and block offset bits). Also, "You may want to use bit-level operations such as andb and shrb and 1-byte move instruction movb to split the address."

Here is my IA32 assembly code thus far

.global check_cache

check_cache:
   pushl              
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