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Why does this PowerPC instruction sequence appear to be setting both cr0 and cr1?

Time:11-26

Upon executing the following set of PowerPC instructions on a big-endian POWER7, why is register r6 == 0b10001000000000000000000000000000?

Is there an implicit condition test from cmpd?

li r3, 420
li r4, 360
cmpd r3, r4
mfocrf r6, 0x80

CodePudding user response:

I should have read closer.

From Power ISA V2.07B:

The POWER4, POWER5, POWER7 and POWER8 processors set to 0's all bytes of register RT other than the byte that contains the specified CR field. In the byte that contains the CR field, bits other than those containing the CR field may or may not be set to 0s.

So this behaviour is expected on the machine I am using.

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