Makefile target with wildcard is not working-CodePudding

I have a simple project, whose folder structure is something like:

ls -R
.:
build  include  makefile  src

./build:

./include:
myfunc.h

./src:
main.cpp  myfunc.cpp

I want to compile the .cpp sources into .o object files, which should end into ./build folder. Using the GNUmake documentation and other sources (e.g. Proper method for wildcard targets in GNU Make), I wrote this makefile:

CXX := g  

CXXFLAGS  = -I./include
CXXFLAGS  = -Wall

OBJDIR := ./build
SRCDIR := ./src

PROGRAM = release

DEPS = myfunc.h

SRC = $(wildcard $(SRCDIR)/*.cpp)
OBJ = $(patsubst $(SRCDIR)/%.cpp, $(OBJDIR)/%.o, $(SRC))

all: $(PROGRAM)

$(PROGRAM): $(OBJ)
    $(CXX) $(CXXFLAGS) -o $(PROGRAM) $(OBJ)

$(OBJDIR)/%.o: $(SRCDIR)/%.cpp $(DEPS)
    $(CXX) $(CXXFLAGS) -c $< -o $@

.PHONY: clean

clean:
    rm $(PROGRAM) $(OBJ)

But I get the error message: make: *** No rule to make target 'build/main.o', needed by 'release'. Stop.. I tried a lot of different ways but I cannot manage to have my .o files end up in the ./build directory. Instead, everything works if I put them in the root directory of the project. I can also make it work by specifying a rule for each object file, but I'd like to avoid that. What am I missing?

(I am using GNUmake version 4.3)

CodePudding user response：

The problem is here:

$(OBJDIR)/%.o: $(SRCDIR)/%.cpp $(DEPS)
    $(CXX) $(CXXFLAGS) -c $< -o $@

See the $(DEPS)? That expands to myfunc.h. The compiler knows where to find that file, because you've given it -I./include, but Make doesn't know where to find it.

Add this line:

vpath %.h include

P.S. If you want to be really clean, you can add a variable:

INCDIR := ./include

CXXFLAGS  = -I$(INCDIR)

vpath %.h $(INCDIR)