Home > Mobile >  Why left shift instruction has two names (SAL and SHL) in x86-64 ISA?
Why left shift instruction has two names (SAL and SHL) in x86-64 ISA?

Time:12-15

I know that logical left shift and arithmetic left shift perform the same operation of multiplying the number with 2k when shifted by k bits. In x86-64 ISA, there are two instructions for logical left shift shl and arithmetic left shift sal. When both instructions are doing the same job, what is the need of creating second instruction?

CodePudding user response:

SHL and SAL are equivalent functionally, but not conceptually. Operation code D3 reserved by x86 architecture for shift/rotate instructions in format r/m32, CL had eight position distinguished by Reg/Opcode field in ModR/M byte:

D3 /0 ROL
D3 /1 ROR
D3 /2 RCL
D3 /3 RCR
D3 /4 SHL
D3 /5 SHR
D3 /6 SAL     # not officially documented
D3 /7 SAR

As both SAL and SHL work in identical way, official Intel documentation leaves the position
of D3 /6 SAL vacant but its encoding works. Some assemblers allow to select this encoding by an undocumented mnemonic SAL2.

SHL/SAL is not the only case of such redundancy. TEST reg, imm encoded by F7 /0 works identically with undocumented encoding F7 /1.

Stephen Morse, architect of 8086's ISA / machine code, wrote a book, the 8086 Primer, currently readable for free on his web site; pages 65, 66 describe shift/rotate machine code, but he doesn't mention the unused /6 encoding, instead saying both SHL and SAL are the same operation and use the D0 /4 opcode. (The book is aimed at programmers using 8086, not directly at analyzing the design decisions, so that's not a total surprise.)

8086 had no #UD illegal-instruction exception: everything decoded as something, and it was likely easiest to arrange for /6 to run the same as /4 so they can both be left shifts instead of making it a NOP. (High bit of the 3-bit /r field is set so its a shift, not rotate, low bit clear so it's left, not right. In that case the middle bit has no effect since we're shifting out of the high bit, not into it.)


Related:

CodePudding user response:

As mention by @ecm in the comments, the probable reason for sal and shl is symmetry with sar and shr. Both left-shift instructions are listed as separate instructions in Intel's Software Developer’s Manual, but have the same op code, i.e. from the processor's point of view they are the same.

  • Related