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Error near "output": syntax error, unexpected output, expecting ')'

Time:09-30

module rc_adder4 (
    input logic[2:0]a, b
    output logic[2:0] s, 
    output logic c_out
    );
    logic [3:0] c;

    rc_adder_slice UUT[2:0] (
    .a(a),
    .b(b),
    .c_in(c[2:0]),
    .s(s),
    .c_out(c[3:1])

);

// COMPLETE USING ARRAY INSTANCING

    assign c[0] = 1'b0;// COMPLETE
    assign c_out = c[3];// COMPLETE
    
endmodule

I tried to run this part, but it said:

near "output": syntax error, unexpected output, expecting ')'

Can anyone help me please?

CodePudding user response:

The simulator I use gives a more meaningful error message:

    output logic[2:0] s, 
         |
xmvlog: *E,POLICI: Expecting a comma between adjacent port declarations.

This is telling you that you need to separate all signals with commas, and you are missing the comma between the last input and first output.

Change:

input logic[2:0]a, b

to:

input logic[2:0]a, b,
//                  ^

Sometimes different simulators can give you more helpful messages. You can sign up for a free account on edaplaygroud to get access to several simulators.

CodePudding user response:

I see a comma missed in the port declaration. Try the below code.

module rc_adder4 (
input logic[2:0]a,
input logic [2:0]b,
output logic[2:0] s, 
output logic c_out
);

logic [3:0] c;

rc_adder_slice UUT_3bit (   //Not sure if '[]' is allowed in instance name
.a(a),
.b(b),
.c_in(c[2:0]),
.s(s),
.c_out(c[3:1])

);

 // COMPLETE USING ARRAY INSTANCING

  assign c[0] = 1'b0;// COMPLETE
  assign c_out = c[3];// COMPLETE

endmodule
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