I am learning the design of Boomv3.

The A part has a write port. The format is

val write_ports = Flipped(Vec(10, Valid(new RegisterFileWritePort(maxPregSz, registerWidth))))

B has a write port. The format is

val write_ports = Vec(5, Valid(new RegisterFileWritePort(maxPregSz, 4)))

C has a write port. The format is

val write_ports = Vec(5, Valid(new RegisterFileWritePort(maxPregSz, 4)))

I want to connect B and C to A.

When i use

A.write_ports  <> B.write_ports
A.write_ports  <> C.write_ports

, here will be a failed @: Left and Right are different length Vecs error.

But my original intention is that the length of A is 10. The length of B and C are both 5. This makes them connect.

But what should I do?

CodePudding user response：

With these two bulk connexions, Chisel can't find where to assign B and C 5-sized Vec to B 10-sized Vec.

You should concatenate B and C vec and write one bulk connexion :

A.write_ports  <> B.write_ports    C.write_ports

I tested it with scatie here.