, ask a question, I am using TL16C750 simulating serial port function, on the other side of the fpga program is implemented, the program but CPU test when there was a problem:
I am using polling mode;
Baud rate, stop bits, parity, it is related by setting the register set is complete;
While watching LSR 0 is readable, can read read data polling monitoring, again framework:
While (1)
{
while(! (LSR& 0 x1))
{
return -1;
}

Char ch=read a number in the register;
}

Fifo is 64, I wrote more than ninety basic it is read out twenty or thirty destiny not stopped, then sending data is read out, LSR overflow error, how is this to return a responsibility excuse me?
And read the first data is 00 forever, for example, I send 02, 03 01 program read is 00 01, 02,

Have a great god do a 16750? Under the guidance of the can,

CodePudding user response:

If a serial port register configuration problems