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Strange: independent not receive UDP debugging assistant, wireshark open, debugging assistants can r

Time:02-06

Recently did a UDP, the FPGA side loopback, PC debugging assistant to send and receive,
1, normal gigabit testing is complete,
2, correlates the next test, first not send data is not received on the debugging assistant, doubt is agreement has a bug;
3, with fpga server-side data, can be observed data of the request and response, however, has been in response to the PC, still no data on the debugging assistant end;
4, open the wireshark, fetching data can see the request of the PC, the fpga response, the sending and receiving data; Check the ARP and UDP each field data are normal;
5, debugging assistants can receive data, the data is normal;
6, after closing again wireshark, debugging assistant data loss;
7, query online some related problems, check the several parts:
1, the firewall: closed and open no effect;
2, check card: select Ethernet nics at a rate of 100, ipv4 check close open, UDP check open, no improvement;
3, wireshark opens the mixed mode: mixed mode off wireshark, wireshark and debugging assistants can receive data;


Conclusion:
Conclusion under the current contradiction, the comb:
A, mixed mode: MAC or IP address and other data may be wrong, but grab the response packet and data to the protocol field is right;
B, if agreement, gigabit also should appear the same problem;
C, if it is a timing issue, open wireshark should not affect the timing and the fpga data;

The suspect program problem, changed the TXC clock (using vivado MAC core), the situation has changed: when opens the wireshark, debugging assistant data reception, but can not all data is received, after opening the wireshark, data back to normal receiving,


Is it timing problem?

CodePudding user response:

Full frame data reception, but not every frame can be received, the interval range,
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