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The design of digital clock based on FPGA is the perpetual calendar;

Time:03-30


The need to implement the functions:
The design of digital clock based on FPGA is the perpetual calendar;
: 1 year, month, day,, minutes, seconds according to
2: when function
3: hour (to the buzzer rang when the hour)
The function of 4: to distinguish the leap year
5: and through LCD1602 LCD display,
6: using Verilog HDL language programming, through the Quartus II software compiled
7: finally downloaded to the FPGA development board to download validation
Additional:
1: a program flow chart, we can see understand code,
Principle 2: best describes code!
3: when, need to adjust part of the scintillation
4: the 1-2-3-4 this several utility programs have corresponding interpretation and best introduction, is actually the first additional,
For example:
Hardware parts: module (clock source is 50 m active crystals)
LCD1602 display module
The key module
Buzzer module
The FPGA minimum system module
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