Consult, topic from the "computer organization principle" Tang Shuo fly version of memory and CPU connection case 4.1, look not to understand the picture A14 (always for high level) can be directly connected to the G1, but A15 (always for low level and low level but effective MREQ will add a circle (seems to be not gate), as shown in figure in the blue circle, what's the use of the circle, why choose line loops Y4 and Y5 also want?

CodePudding user response:

This small circle not presentation logic, this just draw schematic encapsulation, a method of said device pin feet, cadence, for example, you can use a lot of kinds of symbolic representation,

CodePudding user response:

Enter A circle said input is made valid by means of the low level, not high level effectively, output has circle low level effectively, no high level effectively, for example, when entering the G1 high level, G2A, G2B as low level, A, B, low level, high level C, Y4 output for low level, Y5 for high level,

CodePudding user response:

Elder brother, that figure to the left of the similar to the nand gate zha understand? Thank you for your answer

CodePudding user response:

refer to the second floor xuyaqi029 response:

enter A circle said input is made valid by means of the low level, no high level effectively, output has circle low level effectively, no high level effectively, for example, when entering the G1 high level, G2A, G2B as low level, A, B, low level, high level C, Y4 output for low level, Y5 for high level,

Elder brother, that figure to the left of the similar to the nand gate zha understand? Thank you for your answer

CodePudding user response:

king happy ahhh reference 4 floor response:

Quote: refer to the second floor xuyaqi029 response:

enter A circle said input is made valid by means of the low level, no high level effectively, output has circle low level effectively, there is no high level effectively, for example, when entering the G1 high level, G2A, G2B as low level, A, B, low level, high level C, Y4 output for low level, Y5 for high level,

Elder brother, that figure to the left of the similar to the nand gate zha understand? Thank you for your answer

When the input are both low electricity at ordinary times, the output is low level,

CodePudding user response:

Thanks brother thank you brother, hard hard

CodePudding user response:

This should be the principle diagram of the painting gallery that circle is used to specify the purpose of the pin

CodePudding user response:

Loops with table, speak is a circle is the not easy, no loops is 1, (the equivalent of 1 s and 0 s)
G1 no circle on the picture, logo also does not have the above the above a line (DE);
G2, and G3 has loops, logo above has a line (DE),
You can refer to the & lt; The digital circuit & gt;