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The FPGA configuration ov5640 with DVP interface, 1080 p output yuv422 format can reach 30 frames?

Time:09-22

I configuration registers 15 frames can run normally, and can be through the screen, and then according to the manual change PLL configuration register for 30 frames after the crash, oscilloscope for detection and signal line field no problem, PCLK is sine wave shape, does anyone know what's the problem?
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