Tried before network structure, the model of quantitative/pruning to speed up the neural network arithmetic, now just come into contact with the characteristics of the FPGA parallel computing and OpenCL is used to realize speed operation, just to fit in in operation of the model parameters are extracted and sent to the FPGA in this step, online solution,

My new operation is as follows:



Training the neural network



And then get the model of

Behind the parameter extraction and input the FPGA seems a little bit confusion,,,,,,,,

CodePudding user response:

The FPGA in parallel computing and programmable really have the very big development space, but in fact I also have no, LZ

CodePudding user response:

The parameter extraction, after this step will multidimensional array processing for one dimensional array, can be transported into execution of OpenCL,

CodePudding user response:

Under the OpenCL implementation of neural network algorithm, we can see

Then compiled, the algorithm to generate the necessary aocx binaries, can be put on the FPGA implementation,
The building Lord operation a few times more skilled,

CodePudding user response:

I now also are learning to the development of the FPGA design, recommend a free resource to the building, the FPGA online training can see whether can use the

CodePudding user response:

Quote: refer to 4th floor huimouyixiao003 response:

Thank you, I see ~