Turn the circuit where there is a problem, this is a used 74 ls138 decoder for no more than two 3 (i.e., two binary number) of the sum of the number of adder circuits and use monitor display, as shown in figure U6 and U7 display values for two addend, U8 display value and, but the circuit can only realize partially true peace, there is error, please confirm the number of logic bosses,

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Adder implemented using xor gate