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HDMI display ov5640 camera module of FPGA driver

Time:09-24

Without the DDR cache, directly through FIFO, then the output, specific how to implement?

CodePudding user response:

The
refer to the original poster??????????? Jackson's reply:
without DDR cache, directly through the FIFO, then output, specific how to implement?

Made of on chip ram cache

CodePudding user response:

reference 1/f, macro hadron response:
Quote: refer to the original poster??????????? Jackson's reply:
without DDR cache, directly through the FIFO, then output, specific how to implement?

Made of on chip ram cache

Now there is a problem is the input line and field signals and output line, signal synchronization problems, do you have any good idea

CodePudding user response:

According to the amount of data you read, write control signals

CodePudding user response:

I just according to the data part of HDMI output, control read requests, but show special fuzzy
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