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The FPGA debugging error: PLC002

Time:09-24

PKC002: No legal assigment exits for global net CLK_c

CodePudding user response:

In the program written statement

The input CLK/* short syn_noclockbuf=1 */.

Compile;
This statement is: don't let the CLK the network on a global network cabling, namely let a pin on a global network,

CodePudding user response:

Personal think may be your. UCF file has a problem
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