Recently in engineering from 32-bit to 64 - bit, compile-time vs 64 cannot compile inline assembly, personal for assembly of pure white,
Baidu mainstream method, to compile a separate thought the asm file, but the assembly code, copy to the asm file compile time actually don't know some instruction,
What a great god can translate this function in the assembly for c + + language, thank you!

 
Void BlendWithMask_Normal_MMX (BYTE * pBuffer, 
BYTE * pBaseBuffer, 
BYTE * pMask, 
VDWORD dwMaskAlignWidth, 
DWORD dwMaskWidth, 
VDWORD dwMaskHeight) 
{
__int64 nMask=0 x00ff00ff00ff; 
__int32 nColorKey=0 xfffffffe; 
VINT32 nMaskPitch=dwMaskAlignWidth - dwMaskWidth; 
VINT32 nWidth=dwMaskWidth; 
VINT32 nHeight=dwMaskHeight; 

//BlendWithMask_Normal_MMX_ASM (pBuffer, pBaseBuffer pMask, nWidth, nHeight, nMaskPitch) 
The __asm 
{
Mov ebx, nWidth 
Mov ecx, nHeight 
Pxor mm4, mm4 

Mov esi, pBuffer 
Mov edi, pBaseBuffer 
Mov eax, pMask 
JMP line 
Next_line: 
Mov ebx, nWidth 
The add eax, nMaskPitch 
The line: 
Xor edx, edx 
Movd mm0, (esi) 
Movd mm1, (edi) 
Mov dl, [eax] 
Movd was, edx 

Movd edx, mm0//determine whether for 255255254 
CMP edx, nColorKey 
Je normal 
Movd edx, was 
CMP edx, 0 x0 
Je normal 

Punpcklbw mm0, mm4 
Punpcklbw mm1, mm4 
Movq mm5, was 
PSLLQ was, 16 
Por mm5, was 
PSLLQ was, 16 
Por mm5, was 

Movq mm3, mm5 
Pandn mm3, nMask//1 - alpha 

Pmullw mm0, mm5 
Pmullw mm1, mm3 
Paddusw mm0, mm1 
PSRLW mm0, 8 
Packuswb mm0, mm4 
Movd (esi), mm0 
JMP continue_loop 
Normal: 
Movd (esi), mm1 
Continue_loop: 
The add esi, 4 
The add edi, 4 
The add eax, 1 

Dec ebx 
JNZ line 
Dec ecx 
JNZ next_line 
Emms 
} 
} 

Into pure assembly pxor, movd pmullw, paddusw these instructions are not identified, such as 

Wait for a great god for help,

CodePudding user response:

Vc + + 64 does not support inline assembler, please use the Intel c + +, GCC, c + + Builder

CodePudding user response:

reference 1/f, play big shoot early nuclear response:

vc + + 64 does not support inline assembler, please use the Intel c + +, GCC, c + + Builder

Yes, I have to do is, does not support inline replaced the inline assembly, and take out or do separate assembly file compiling,

CodePudding user response:

You switch to support 64 - bit embedded assembly compiler, such as Intel c + +, GCC, c + + Builder, you can continue to use his code above, based on the 32-bit addressing esi, edi, eax into a 64 - bit register rsi, rdi, rax, other need not change
But this code is very old, he is based on MMX, more than ten years since few programs use, and to write is not very optimized, such as:
Xor edx, edx
Movd mm0, (esi)
Movd mm1, (edi)
Mov dl, [eax]
Movd was, edx
This period, not only waste the one instruction, and in some architecture can cause called partial register stall, additional delay can be changed to:
Movzx edx, byte PTR (eax)
Movd mm0, (esi)
Movd mm1, (edi)
Movd was, edx