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Keep carry adder (CSA) of the verilog design

Time:09-26

Keep carry adder (CSA) is a kind of speed in the adder, its structure is better than traveling wave carry adder is a little more complicated, such as a CSA adder verilog implementation;

CodePudding user response:

The module CSA4 (
Input [3-0] opa,
Opb input [3-0],
Input (3-0) ci,
The output (3-0) sum,
The output [Wednesday] co
);
Assign the sum=opa ^ opb ^ ci;
The assign co=(opa& Opb | opa& Ci | opb& Ci) & lt; <1;

endmodule
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