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Xilinx fpga loaded, done signal is low
Time:09-27
DONE signals in FPGA loading should be after the completion of high level, but on the board to work after a period of time (the board) after the temperature of the heat and electricity will be DONE on the signal again has been as low level, the FPGA didn't finish loader, cause systems don't work properly, every time is this kind of phenomenon is not electricity, when power up after a period of time will have, don't know if it has something to do with the temperature, or where the configuration is wrong? (k7 using XILINX FPGA series, flash is s25fl132k, DONE is to use the pull up resistance of 330 ohms,), ask for help! Thank you so much.