//* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *//
//9 SQH serial data output pin - & gt;//
//10 SCLR shift register data reset//
//11 SCK serial data input: clock SHCP//
//12 RCK output latch end: memory clock STCP//
//13 output can make the OE: low level of the OE//
//14 SDA serial data input: dredging DS//
//* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *//# include "Drv_74HCT595. H"////
//U41 PH [11]//# define MCU_PIN140_595_EN_Port (PTH) # define MCU_PIN140_595_EN_Pins (u) 11 # define MCU_PIN140_595_EN_Hig PINS_DRV_WritePin (MCU_PIN140_595_EN_Port MCU_PIN140_595_EN_Pins, D_HIGH); # define MCU_PIN140_595_EN_Low PINS_DRV_WritePin (MCU_PIN140_595_EN_Port MCU_PIN140_595_EN_Pins, D_LOW);//PE [15] # define MCU_PIN137_595_DS1_Port (PTE) # define MCU_PIN137_595_DS1_Pins (u) 15 # define MCU_PIN140_595_DS1_Hig PINS_DRV_WritePin (MCU_PIN140_595_DS1_Port MCU_PIN140_595_DS1_Pins, D_HIGH); # define MCU_PIN140_595_DS1_Low PINS_DRV_WritePin (MCU_PIN140_595_DS1_Port MCU_PIN140_595_DS1_Pins, D_LOW);

//PG [11] # define MCU_PIN139_595_SCLK_Port (PTG) # define MCU_PIN139_595_SCLK_Pins (u) 11 # define MCU_PIN140_595_SCLK_Hig PINS_DRV_WritePin (MCU_PIN139_595_SCLK_Port MCU_PIN139_595_SCLK_Pins, D_HIGH); # define MCU_PIN140_595_SCLK_Low PINS_DRV_WritePin (MCU_PIN139_595_SCLK_Port MCU_PIN139_595_SCLK_Pins, D_LOW);

//PG [10] # define MCU_PIN138_595_STCP_Port (PTG) # define MCU_PIN138_595_STCP_Pins (u) 10 # define MCU_PIN140_595_STCP_Hig PINS_DRV_WritePin (MCU_PIN140_595_STCP_Port MCU_PIN140_595_STCP_Pins, D_HIGH); # define MCU_PIN140_595_STCP_Low PINS_DRV_WritePin (MCU_PIN140_595_STCP_Port MCU_PIN140_595_STCP_Pins, D_LOW);//* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *//define EN_74HCT595CHANNEL_MAX 24//apply for a 24 cache array; INT8U TempOutData [EN_74HCT595CHANNEL_MAX]={0};
//* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *//
The static void Drv_74HCT595_SendData (void) {unsigned char SendData_LoopW; Unsigned char SendData_LoopM; Unsigned char SendData_LoopN;//24 data received from the pointer to the array of new cache; For (SendData_LoopN=0 x00; SendData_LoopN & lt; EN_74HCT595CHANNEL_MAX; SendData_LoopN + +) {TempOutData [SendData_LoopN]=* p74HCT595TableInfo [SendData_LoopN] OutData; }//cycle: 3, 8 data at a time, there were 24 data; For (SendData_LoopW=0 x00; SendData_LoopW & lt; 0 x03; SendData_LoopW + +) {U1 - MCU_PIN140_595_STCP_Low (); For (SendData_LoopM=0 x00; SendData_LoopM & lt; 0 x08; {SendData_LoopM + +) for (SendData_LoopM=0 x00; SendData_LoopM & lt; 0 x08; SendData_LoopM + +) {MCU_PIN140_595_SCLK_Low;//the clock line low level if ((TempOutData [SendData_LoopW * 0 x08 + SendData_LoopM] & amp; 0 x80)==0 x80) {MCU_PIN140_595_DS1_Hig;
//p74HCT595TableInfo [when] p74HCT595_DS_H_Func (); High level} else {//cable MCU_PIN140_595_DS1_Low;
//p74HCT595TableInfo [when] p74HCT595_DS_L_Func (); Low level}//cable MCU_PIN140_595_SCLK_Low ();//serial clock up along the: move bit bit data MCU_PIN140_595_SCLK_Hig (); }} MCU_PIN140_595_STCP_Hig;//latched data; }}

//* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *//