Each group of GPIO port has 10 register
Configuration of four 32-bit registers:
A port mode register: 32-bit divided into 16 groups, corresponding to 16 pin
00: input mode (reset) floated input
01: general output mode
10: reuse function mode
11: simulation mode
A port output type register: 32-bit only enable low 16, corresponding 16 pin
Zero: push-pull output (reset)
1: open drain output
A port output speed register: 32-bit divided into 16 groups, corresponding to 16 pin
00: low speed 2 MHZ
01: medium speed 25 MHZ
10: fast 50 MHZ
11: the 100 MHZ
A port or register: 32 divided into 16 groups, corresponding to 16 pin
00, supreme pull or drop-down (floating empty)
01: on
10: dropdown
11: keep
Two 32-bit data register:
A port input data register: 32-bit enabled low 16
IDR0 ~ IDR15 GPIOA IDR0=1 in the group, for example, namely GPIOA0 high level input
A port output data register: 32-bit enabled low 16, use the same output data register
A 32 bit position/reset register BSRR: divided into low 16 high setting (port) and 16 (port reset)
In the library function is primarily operating setting/reset register
The GPIO port control output level
Low 16:1: input port setting, let the output port 1
Enter 0:
port is not affectedHigh 16:1: input port reset, let the IO port 0
Enter 0:
port is not affectedPort setting/reset register write value will eventually be mapped to the port output register
A 32-bit port configuration latch register: 32-bit enabled low 17
A 16: lock key LCKK
0: port configuration lock key inactive
1: port configuration lock has been activated
Bit 0 ~ 15: port x lock bits y, only in a lock key LCKK equal to zero when the executable write
0: port configuration unlocked
1: port configuration has targeted
Two 32-bit multiplexing function registers