The module exam_4_nop (
The input CLK, reset,
The data input [away],
The output reg [away] sign
);

Reg [2-0] state;
Reg now_location;
The integer I=1;
The parameter s0='d0, s1=' d1, s2='d2, s3=d3;

Always @ (posedge CLK) begin
I <=I + 1 'd1; Now_location <=data [I];
End

Always @ (posedge CLK)
The begin
If (reset) the begin state <=s0; Sign=8 'b00000000; End
The else case (state)
S0: begin
If (now_location==0) begin sign [I - 1) <=0; State <=s1; End
The else begin sign] [I - 1 <=0; State <=s0; End
End
S1: the begin
If (now_location==1) begin sign [I - 1) <=1; State <=s2; End
The else begin sign] [I - 1 <=0; State <=s1; End
End
S2: the begin
If (now_location==0) begin sign [I - 1) <=0; State <=s1; End
The else begin sign] [I - 1 <=1 'b0; State <=s0; End
End
Default: state <=s0;
Endcase
End


endmodule