SI4463 longer mode to transmit data, average data is normal, but if the last byte of data transmission is 0 x00, receiver module, after receiving, won't produce interrupts, the inside of the receiver module RX_FIFO directly read data, the data is complete to receive, now doubt if this is a BUG of SI4463, fixed-length mode is normal, I don't know which master know that this is precisely what's going on,

Additional CRC check, configured, SI4463 send automatically generated CRC check, received after, oneself do CRC check again?

CodePudding user response:

Excuse me, would you please tell me you is driven with the stm32 si4463