Verilog Verilog grammar foundation of programming language synthesize actual circuit Verilog Module: the Module module_name (port_list); Port declaration data type declarations circuit specification temporal specification Endmodule register data type: can register is one of the following: register, integers, real Numbers, time, real time can only be declared in the process, task or function in the module assignment reg type variables can't be a logic gate output, or the assign statement output data default process 32 bits wide decimal number assignment module: Initial: simulation is used to initialize the behavior of the statement (overlooked by comprehensive device) using the assign keywords or in the statement for the wire type assignment at the same time, Always: use statement is used to describe each circuit function Always represent different process and Initial module, the process to run in parallel, at the beginning of the simulation time 0, the sequence of statements and in the process of implementation, Always cannot be nested, and Initial module group assignment (=) and non-blocking assignment (& lt;=) block sequentially, non-blocking performed simultaneously at the end of the time Always process Always @ (a or b or c) combinational logic is sensitive to use all of the input (input changes trigger) Always @ (CLK) clock circuit, is sensitive to the clock and control signal behavior statement If lese for conditions evaluated in the order from top to bottom, have priority Case statement immediately to statement of conditions, there is no priority loop statement is used to repeat operation (while) must be used for more than three Always or initial module, these behavior statements can also be used in the process of the clock can be comprehensive grammar subset Wire is often used in temporal logic is one of the wires, reg in PM logic integrated into registers the Assign is often used in combinational logic, Always can be used in combination with timing (generally trigger signal timing) for level for combination or for

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