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The verilog design combination lock

Time:10-08

Language: verilog HDL
Requirements:
1, design a combination lock control circuit, when the input the correct code, the lock output to drive actuators work, with a red light, green light shut out said, with a green light, red light out said the lock;
2, the lock control circuit stored in a 4 bit binary code can be modified, when the lock button switch input code is equal to the storage of code, the lock;
3, from the first button touches after 30 seconds if not open the lock, the circuit long alarm 30 s, if the input password mistake once or twice, then every time a short report to the police, 5 s, if lose the wrong password three times the alarm,

CodePudding user response:

LZ have searched on the Internet, there should be a lot of similar code, and change can meet the requirements of you,

CodePudding user response:

Four combination design: can set the password, the password correctly green light, red light, on the wrong password three times error lock, the password can back and remove in the process, based on the FPGA to realize, seven segment digital tube display, red and green LED display input password right or wrong
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