I am using pritues simulation 4046 phase-locked loop, open circuit parameters are also in accordance with the datasheet of ah, but the simulation of it in the center frequency or into the lock, pin 1 output is high level and low level, alternately,
Does anyone know how to design the CD4046 phase-locked loop, how to adjust parameters? Save the children!!!!!! I have not learned phase-locked loop, haven't contact before, but recently a big homework to use, dry...