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The FPGA Verilog

Time:10-12

? Experimental functional requirements: if the farm road vehicles, in the highway to maintain the green, in detecting the farm road cars
Vehicles, highway traffic lights should be from green to yellow, and red, and allow the farm road direction lights turn green, green
The light for a period of time, the change from green to yellow to red,
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For the convenience of the experiment, the probe button, when press the button on the FPGA development board, the trigger signal
Equivalent to detect the way someone farm,
This what bosses can help take specific steps to write about? Although has been finished, but still don't know much about

CodePudding user response:

Intersection problem
Test button
Light green to yellow to red
Farm direction priority job green yellow red
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