Found in writing S32 ADC underlying all CHN conversion results are concentrated in RO this register, is there a demo can be multi-channel acquisition

CodePudding user response:

Multi-channel acquisition is usually a set of ADC + register Radc
Every turn over, interrupt, interrupt program read the Radc, transition to the next channel, starts a new transformation,,,,,,,,,,,,,,

CodePudding user response:

Because S32K144 AD conversion result register an Rn is 32, with external CHN is the corresponding, I think it should be used

CodePudding user response:

So many feeling that there is no use

CodePudding user response:

Well, make out, need to use S32K144 internal PDB to do pre trigger processing,

CodePudding user response:

LZ can share multi-channel routines? Has recently been s32k do...

CodePudding user response:

Void ADC_Init_ (void)
{


The PCC - & gt; PCCn [PCC_ADC0_INDEX] & amp;=~ PCC_PCCn_CGC_MASK;/* Disable clock to PCS */
The PCC - & gt; PCCn [PCC_ADC0_INDEX] |=PCC_PCCn_PCS (3);/* PCS=1: Select SOSCDIV2 */
The PCC - & gt; PCCn [PCC_ADC0_INDEX] |=PCC_PCCn_CGC_MASK;/* the Enable bus clock in ADC */


ADC0 - & gt; CFG1 |=ADC_CFG1_ADICLK (0)/* Only ALTCLK1 is */
/* | ADC_CFG1_ADIV (8) the clock rate is (input clock)/4 */
| ADC_CFG1_MODE (2);/* ADICLK=0: Input CLK=ALTCLK1=SOSCDIV2 */
/* ADIV=0: Prescaler=1 */
/* MODE=2:10 - bit conversion */

ADC0 - & gt; CFG2=ADC_CFG2_SMPLTS (12);/* SMPLTS=12 (default) : the sample is 13 ADC CLKS */
ADC0 - & gt; SC2=ADC_SC2_ADTRG_MASK/* ADTRG=1: HW trigger */
| ADC_SC2_REFSEL (1);/* ACFE ACFGT, ACREN=0: Compare func disabled */
/* DMAEN=0: DMA disabled */
/* REFSEL=1: Voltage reference pins=VREFH, VREEFL */
ADC0 - & gt; SC1 [0]=ADC_SC1_ADCH (9);/* Select AD9 (ADC0_SE9) @ PTC1 */
ADC0 - & gt; SC1 [1]=ADC_SC1_ADCH (10);/* Select AD10 (ADC0_SE10) @ PTC2 */
ADC0 - & gt; SC1 [2]=ADC_SC1_ADCH (11);/* Select AD11 (ADC0_SE11) @ PTC3 */
ADC0 - & gt; SC1 [3]=ADC_SC1_ADCH (12);/* Select AD12 (ADC0_SE12) @ PTC14 */
ADC0 - & gt; SC1 [4]=ADC_SC1_ADCH (13);/* Select AD13 (ADC0_SE11) @ PTC15 */
ADC0 - & gt; SC1 [5]=ADC_SC1_ADCH (14);/* Select AD14 (ADC0_SE12) @ PTC16 */

ADC0 - & gt; SC3=0 x00001000./* CAL=0: Do not start calibration sequence */
/* ADCO=0: One conversion performed */
/* AVGE, AVGS=0: HW business function disabled */




}

Void PDB0_Init (void)
{

The PCC - & gt; PCCn [PCC_PDB0_INDEX] |=PCC_PCCn_CGC_MASK;/* the Enable bus clock in PDB0 */

PDB0 - & gt; SC |=PDB_SC_TRGSEL (0 xf) |/* b1111: Software trigger is selected */
|/* Prescaler PDB_SC_PRESCALER (8) : 010.=per CLCK/MULT (4 *)=80/(4 * 1)=20 MHZ */
PDB_SC_PDBIE (1) |/* PDB interrupts enabled */
PDB_SC_MULT (2) |/* 00: Multiplication factor is 1. */
PDB_SC_CONT (1) | Continuous mode of operation *//*
PDB_SC_PDBEN_MASK |/* 1: PDB enabled */
PDB_SC_LDOK_MASK;
PDB0 - & gt; IDLY=10000;
PDB0 - & gt; MOD=PDB_MOD_MOD (14400);
PDB0 - & gt; CH [0]. C1 |=PDB_C1_BB (0 xfe)//For Continuos Pre - Trigger Mode

| PDB_C1_TOS (0 x0)//Pretrigger Output Select: 0=bypassed, 1=enabled

| PDB_C1_EN x3f (0);//PDB channel 's pre - trigger enabled



//Enable_Interrupt (PDB0_IRQn);
INT_SYS_InstallHandler (PDB0_IRQn, & amp; PDB0_Handler, 0) (isr_t *);
INT_SYS_EnableIRQ (PDB0_IRQn);


PDB0 - & gt; SC |=PDB_SC_SWTRIG_MASK;/* */restart PDB counter

}

This is in the PDB interrupt read ADC values