When we in the lap circuit, will give us the custom pl part of the IP assigned a base address for example # define XPAR_MYIP_0_S00_AXI_BASEADDR 0 x43c00000 the base address is what to do with it is through the base address and offset can access IP within each register?? So what do you think the register for the address of the CPU registers in a mapping to memory access to, or to directly access?? Hope to help solve

CodePudding user response:

I use small real-time kernel or streaking, base address + offset can achieve register to access the IP core of PL, run Linux time also, simple about the same is true of IP core driver (driver isn't what I do, I also don't understand, forgive me just do the hardware), should be a mapping address plus the offset,

CodePudding user response:

Add, 32-bit processor addressing space for 4 g, peripherals or have a lot of space available!

CodePudding user response:

Thank you for your answer, finally someone speak thank you!!!!! Want to ask where can see the IP core of each register address?? Now I don't know the IP core register corresponding address??

CodePudding user response:

Also are studying the communication of PS and PL