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The FPGA I/O port can resist 5 v voltage
The FPGA I/O port can resist 5 v voltage? Foreigner is design a board using Actel EX256 - TQG100 fuse chip, chip manual IO mouth can use voltage of 2.5 V or 3.3 V, the actual use 5 V, for a long time, there is no problem running, the fuse chip really can't afford to use, want to find a replacement of chip ALTERA, IO mouth can resist 5 V voltage?
