Recent work on a project, it is necessary to use xdma, namely the DMA/Bridge System for PCI Express, but the IP core, both M_AXI, M_AXI_LITE, excuse me what is the difference between the two? If there is no PCIe corresponds to the board of the IP core, with a soft nuclear can direct operation? How to operate? My board is Xilinx Zynq UltraScale + zcu102,

CodePudding user response:

General lite will cut off some continuous read configuration priority functions such as concrete or look at the code