Through external SDRAM EMIF2 operation, found to CS0 selection a fixed address write data, all address will become the data, check the program after an inconclusive, to TI's official website to download controlSUIT tool, reference emif1_16bit_sdram_far_cpu01 and emif_32bit_sdram_cpu01 two engineering, change two demo EMIF1 related field configuration to EMIF2, continue to test, found the same problem, I want to ask someone to know why? I saw a 2014 people on the BBS asked TI engineer similar problems, but seemingly not solve the key problems,