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SDF negative delay how to solve

Time:11-18

ASIC copy after the last line of the simulation process, namely the timing simulation,
Imitation and simulation before the biggest difference is that after the introduction of the temporal concepts and sequential examination, routine is the timing didn't here is not much to do, the key to introduce negative delay,
As technology constantly updated, part of the process can be achieved even negative DELAY (at first, I also is very not understand), the DELAY is a relative concept, when the device driver ability is very poor and the load is small, can lead to load voltage to reach the threshold, the device database show the IOPATH DELAY is negative,
This negative number is difficult to solve in the process of simulation, the simulator can't realize the signal of negative delay, the simulator solution is generally in the library to borrow some before and after the delay, the negative offset, if time delay is not available before and after, will ignore the negative delay, the zero delay, at the same time, the standard LOG will give a warning,
Current mainstream emulator VCS have clear instructions, when we open the negative DELAY function (negdelay), we need to make sure IOPATH_DELAY + DEVICE DELAY is positive, or INTERCONNECT_DELAY + DEVICE_delay is positive, otherwise you will ignore the negative DELAY,
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