Home > other >  Hardware description [transfer] FFT algorithm (8)
Hardware description [transfer] FFT algorithm (8)

Time:11-18

reproduced in: https://www.cnblogs.com/sleepy/archive/2011/07/12/2104703.html


Using the algorithm of base 2 (sampling frequency)

First determine several level DFT:

N=8, so v=3 (level)


0/8-0
- 1/8-45 degrees of
- 2/8-90
- 3/8-135

To save time, 0 degrees and 90 degrees - do not use cordic (achieved by 2 's complement and BUS exchange)
Therefore, only the first level of the tertiary DFT two CORDIC
Note: the first level is the input is real back (time-domain sampling value) of the second and third pole input is real, image

There are many methods to complete this level 3, here under the simple said three solutions:
A, iterative method: use level of repeated calculation module 3
Features: occupy less time-consuming greater resources
B, line method: USES three modules respectively calculate
Features: big time consuming small occupancy resources
C (recommended), the use of two modules, the first water way, the second use iterative methods, combination
Features:
compromise between the time and space
8 * 12 12 serial data input parallel data output:


Butterfly algorithm block diagram:



Enter the highest level of the sign bit 1 negative
(cordic algorithm in the previous article, here don't repeat it)
Have said before finish 2, 3 two DFT with same module
How to use the same circuit for two different operation?
The input sequence of data for the following transform (visible two structure will be the same) :


Input output data into VECTORING CORDIC image is available mode (namely) of frequency domain model of vector
Finally, parallel serial output:


Total consumption time:


Resources:

  • Related