CodePudding user response:
As soon the sampling frequency, speed of data processing is slow, so I wouldn't throw number can only save post-processing,CodePudding user response:
Adc register can only hold a data, the use of adc + dma can save large amounts of data without the need for the CPU to participate in, so that we can reduce the frequency of the CPU data query,CodePudding user response:
Appropriate use of the cache areaCodePudding user response:
Answer your first question:When configuring sampling ADC + single cache DMA channels, if the ADC sampling speed is quick, read slowly, so read ADC values is the value of the recently, and the time period between last read samples values have been set, or lost,
This configuration mode and read the mechanism, on the function really register operation and direct reading no difference; On the operation mechanism is not the same, however, require directly read the register system clock, but using DMA is equivalent to the CPU use double thread, which does not affect the operation of the system task, just a memory read a data -
Develop: (reference only)
If measure the voltage is a similar need to filter, ADC + can be used more than the DMA buffer configuration,
In single channel ADC + DMA measuring voltage, for example, configure ADC + DMA, define a cache BUF [20], each collect a sample value in BUF, store address + + at the same time, every time a new value to refresh before the first 20 historical value, guarantee every time is the latest in BUF 20 value; BUF when he reads in the averaged 20 values, namely the current voltage value, this method can be simple filtering effect,
CodePudding user response:
The dma can yield the CPU, dynamically allocated buf can solve the problem of coverageCodePudding user response:
Upstairs right, reasonable distribution of bufer store data, dynamic allocation is the most good!CodePudding user response:
If treatment is not to prove that don't need so high sampling speed