1. The FPGA JTAG signal through isolation chip derivation, using ise can identify to FPGA can not identify the JTAG ARM JTAG; Use vivado what also can't identify;
2. If not TDO signal isolation chip, through direct fly line directly connected on both sides (level), ise and vivado cannot identify to the JTAG,
Who is a great god have encountered similar problems, your smile!

CodePudding user response:

Need to add it

CodePudding user response:

Or on a figure and have a look,,,,

CodePudding user response:

Can elaborate on it?