SPI2 configuration becomes a width of 8 bits of data, do feature is M453 send Tdata [I] to STC8 from machine, from machine STC8 return Rdata M453 [I], a problem now is that I want to send Tdata + 4] [I can read in RX register Rdata [I] value, saw others configuration SPI0 code, the feeling is the same, data manual watched several times also can not find the reason, hope someone here can give me to reassure

1: my understanding is the RX register is RXFIFO cache, I do not know whether it is right,

2: RX is a 32-bit registers, I read the value of only eight, estimate is the reason why I configuration into 8 bit width,
So when I send Tdata [4], read the RX is Rdata [0], already returned Rdata [1 ~ 4] value is M453 store to where go to? The address is how much, or how to read it out?

3: how to read in real time the data returned?

CodePudding user response:

Article 3 the problem has been solved, as long as read immediately after sending data can read real-time data, as for the second, not immediately read would have read the previous 5 data problem still confused,