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Stm32miniADC can sampling 0 v and 3.3 v but not 0.07 v?

Time:12-17

Stm32miniADC can sampling 0 v and 3.3 v but not 0.7 v
https://ask.csdn.net/questions/4645843
USES the ADC1, 16 channel 4 is not normal (channel 3 5 6 7),

Channel 2 normal

Channel 3 has been 3.29 v, 0.07 v is 2.89 v, feel the pull

Acquisition normal 0 v and 3.3 v

The code
The code

Adc. H
 
# # ifndef __ADC_H
# define __ADC_H
# include "sys. H"
# define N//50 per channel by 50 times
16//# define M up to 16 channels of
Void GPIO_Configuration (void);
Void RCC_Configuration (void);
Void ADC1_Configuration (void);
Void DMA_Configuration (void);
Void Init_All_Periph (void);
Under-16 GetVolt (under-16 advalue);
Void filter (void);

# endif


Adc. C
 # include "adc. H" 
# include "delay. H"
Extern vu16 AD_Value [N] [M].//used to store the ADC conversion results, is also the goal of the DMA address
Extern vu16 After_filter [M].//used to store after averaging the results of the
/* GPIO pin configuration
Choose the ADC channels corresponding pin for
PA0 0
PA1 1
PA2 2
.
.
.
PA7 7
PB0 8
PB1 9
PC0 10
PC1 11
PC2 12
PC3 13
PC4 14
PC5 15
*/


Void GPIO_Configuration (void)
{
GPIO_InitTypeDef GPIO_InitStructure;

//PA0/1/2? As an analog channel input pins?????????????????????????????????????????
GPIO_InitStructure. GPIO_Pin=GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5 | GPIO_Pin_6 | GPIO_Pin_7;
GPIO_InitStructure. GPIO_Mode=GPIO_Mode_AIN;//analog input pin
GPIO_Init (GPIOA, & amp; GPIO_InitStructure);

//PB0/1? As an analog channel input pins?????????????????????????????????????????
GPIO_InitStructure. GPIO_Pin=GPIO_Pin_0 | GPIO_Pin_1;
GPIO_InitStructure. GPIO_Mode=GPIO_Mode_AIN;//analog input pin
GPIO_Init (GPIOB, & amp; GPIO_InitStructure);
//PC0/1/2/3/4/5? As an analog channel input pins?????????????????????????????????????????
GPIO_InitStructure. GPIO_Pin=GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_2 | GPIO_Pin_3 | GPIO_Pin_4 | GPIO_Pin_5;
GPIO_InitStructure. GPIO_Mode=GPIO_Mode_AIN;//analog input pin
GPIO_Init (GPIOC, & amp; GPIO_InitStructure);
}

/* to configure the system clock, can make the peripheral clock */


Void RCC_Configuration (void)
{

FLASH_PrefetchBufferCmd (FLASH_PrefetchBuffer_Enable);//Enable? Prefetch? Buffer
FLASH_SetLatency (FLASH_Latency_2);//Set? 2? Latency? Cycles
RCC_HCLKConfig (RCC_SYSCLK_Div1);//AHB? Clock??=? SYSCLK
RCC_PCLK2Config (RCC_HCLK_Div1);//APB2? Clock?=? HCLK
RCC_PCLK1Config (RCC_HCLK_Div2);//APB1? Clock?=? HCLK/2
RCC_PLLConfig (RCC_PLLSource_HSE_Div1, RCC_PLLMul_6);//PLLCLK?=? 12 MHZ? *? 6?=? 72 MHZ
RCC_PLLCmd (ENABLE);//Enable? PLL
While (RCC_GetFlagStatus (RCC_FLAG_PLLRDY)==RESET);//Wait? Till? PLL? is? Ready??
RCC_SYSCLKConfig (RCC_SYSCLKSource_PLLCLK);//Select? PLL? as? The system? Clock? The source
while(RCC_GetSYSCLKSource() !=0 x08);//Wait? Till? PLL? is? 2? as? The system? Clock? The source
/* * can make various peripherals the clock
RCC_APB2PeriphClockCmd (RCC_APB2Periph_GPIOA | RCC_APB2Periph_GPIOB
| RCC_APB2Periph_GPIOC | RCC_APB2Periph_ADC1 | RCC_APB2Periph_AFIO
| RCC_APB2Periph_USART1, ENABLE);//can make ADC1 channel clock, each pin clock
/*? Configure? ADCCLK? To? as? ADCCLK?=? PCLK2/6? */
RCC_ADCCLKConfig (RCC_PCLK2_Div6);//72 m/6=12, ADC maximum time can't more than 14 m
RCC_AHBPeriphClockCmd (RCC_AHBPeriph_DMA1, ENABLE);//can make DMA transfer

}


/* ADC1 configuration */
Void ADC1_Configuration (void)
{
ADC_InitTypeDef ADC_InitStructure;
ADC_DeInit (ADC1);//will peripherals? ADC1? All of the registers reset to the default

/*? ADC1? configuration? ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ ‐ */
ADC_InitStructure. ADC_Mode=ADC_Mode_Independent;//ADC work modes: ADC1 and ADC2 working in independent mode
ADC_InitStructure. ADC_ScanConvMode=ENABLE;//modulus conversion work in scan mode
ADC_InitStructure. ADC_ContinuousConvMode=ENABLE;//modulus conversion work in continuous conversion mode
ADC_InitStructure. ADC_ExternalTrigConv=ADC_ExternalTrigConv_None;//external trigger conversion close
ADC_InitStructure. ADC_DataAlign=ADC_DataAlign_Right;//ADC data right-aligned
ADC_InitStructure. ADC_NbrOfChannel=M;//in order to convert the rules of the number of ADC channel
ADC_Init (ADC1, & amp; ADC_InitStructure);//set according to the specified parameters in ADC_InitStruct initial non-greeks ADCx register

/*? ADC1? Regular? Channel11? configuration? */
//sets the rules set the specified ADC channels, set up their order and sampling time
//ADC1, ADC channel x, rule sampling sequence value of y, sampling time was 239.5 cycle
ADC_RegularChannelConfig (ADC1, ADC_Channel_0, 1, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig (ADC1, ADC_Channel_1, 2, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig (ADC1, ADC_Channel_2, 3, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig (ADC1, ADC_Channel_3, 4, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig (ADC1, ADC_Channel_4, 5, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig (ADC1, ADC_Channel_5, 6, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig (ADC1, ADC_Channel_6, 7, ADC_SampleTime_239Cycles5);
ADC_RegularChannelConfig (ADC1, ADC_Channel_7, 8, ADC_SampleTime_239Cycles5);
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