The understanding of SCM interrupt-CodePudding

Have been using Freescale S9S12G128 series, have some doubts about the broken part, want to put forward some directions for sure, please said few words directly on the code, you can see 3 code, respectively is PE generated Vector. C files, stored inside the interruption to the scale, the other one is SM1. C file (SPI) bus , one of the SM1_RecvChar () receive function, and a ISR (SM1_Interrupt) interrupt function, as follows:

Vector. C file:
Typedef void (* near tIsrFunc) (void);
/* lint - save - e950 Disable MISRA rule (1.1) checking. */
The static const tIsrFunc _InterruptVectorTable [] @ 0 x7f80u={/* Interrupt vector table */
/* lint to restore the Enable MISRA rule (1.1) checking. */
/* ISR name No. Address name Description */
& Cpu_Interrupt,/* 0 x40 0 xff80 ivVsi unused by PE */
& Cpu__ivVportad,/* 0 x41 0 xff82 ivVportad informs by PE */
& Cpu_Interrupt, x42/* 0 0 xff84 ivVatdcompare unused by PE */
& X43 Cpu_Interrupt,/* 0 0 xff86 ivVReserved60 unused by PE */
& X44 TI2_Interrupt,/* 0 0 xff88 ivVapi informs by PE */
& X45 Cpu_Interrupt,/* 0 0 xff8a ivVlvi unused by PE */
& X46 Cpu_Interrupt,/* 0 0 xff8c ivVReserved57 unused by PE */
& X47 Cpu_Interrupt,/* 0 0 xff8e ivVportp unused by PE */
& X48 Cpu_Interrupt,/* 0 0 xff90 ivVReserved55 unused by PE */
& X49 Cpu_Interrupt,/* 0 0 xff92 ivVReserved54 unused by PE */
& X4a Cpu_Interrupt,/* 0 0 xff94 ivVReserved53 unused by PE */
& X4b Cpu_Interrupt,/* 0 0 xff96 ivVReserved52 unused by PE */
& X4c Cpu_Interrupt,/* 0 0 xff98 ivVReserved51 unused by PE */
& X4d Cpu_Interrupt,/* 0 0 xff9a ivVReserved50 unused by PE */
& X4e Cpu_Interrupt,/* 0 0 xff9c ivVReserved49 unused by PE */
& X4f Cpu_Interrupt,/* 0 0 xff9e ivVReserved48 unused by PE */
& X50 Cpu_Interrupt,/* 0 0 xffa0 ivVReserved47 unused by PE */
& Cpu_Interrupt,/* 0 x51 0 xffa2 ivVReserved46 unused by PE */
& X52 Cpu_Interrupt,/* 0 0 xffa4 ivVReserved45 unused by PE */
& X53 Cpu_Interrupt,/* 0 0 xffa6 ivVReserved44 unused by PE */
& X54 Cpu_Interrupt,/* 0 0 xffa8 ivVReserved43 unused by PE */
& X55 Cpu_Interrupt,/* 0 0 xffaa ivVReserved42 unused by PE */
& X56 Cpu_Interrupt,/* 0 0 xffac ivVReserved41 unused by PE */
& X57 Cpu_Interrupt,/* 0 0 xffae ivVReserved40 unused by PE */
& X58 CanTxInterrupt_0,/* 0 0 xffb0 ivVcantx unused by PE */
& X59 CanRxInterrupt_0,/* 0 0 xffb2 ivVcanrx unused by PE */
& X5a CanErrorInterrupt_0,/* 0 0 xffb4 ivVcanerr unused by PE */
& X5b CanWakeUpInterrupt_0,/* 0 0 xffb6 ivVcanwkup unused by PE */
& Cpu_Interrupt,/* 0 x5c 0 xffb8 ivVflash unused by PE */
& X5d Cpu_Interrupt,/* 0 0 xffba ivVflashfd unused by PE */
& X5e Cpu_Interrupt,/* 0 0 XFFBC ivVspi2 unused by PE */
& amp; X5f SM1_Interrupt, /* 0 0 xffbe ivVspi1 informs by PE */
& Cpu_Interrupt,/* 0 x60 0 xffc0 ivVReserved31 unused by PE */
& X61 AM1_Interrupt,/* 0 0 xffc2 ivVsci2 informs by PE */
& X62 Cpu_Interrupt,/* 0 0 xffc4 ivVReserved29 unused by PE */
& X63 Cpu_Interrupt,/* 0 0 xffc6 ivVcpmuplllck unused by PE */
& X64 Cpu_Interrupt,/* 0 0 xffc8 ivVcpmuocsns unused by PE */
& Cpu_Interrupt,/* 0 x65 0 xffca ivVReserved26 unused by PE */
& X66 Cpu_Interrupt,/* 0 0 XFFCC ivVReserved25 unused by PE */
& X67 S12_LIGHT_Interrupt,/* 0 0 xffce ivVportj informs by PE */
& X68 Cpu_Interrupt,/* 0 0 xffd0 ivVReserved23 unused by PE */
& X69 AD1_Interrupt,/* 0 0 xffd2 ivVatd informs by PE */
& X6a Cpu_Interrupt,/* 0 0 xffd4 ivVsci1 unused by PE */
& X6b Cpu_Interrupt,/* 0 0 xffd6 ivVsci0 unused by PE */
& nullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnullnull