I recently in the select a map, on the configuration file has the following a few questions want to consult everybody:
1. Select the map can be loaded (next to the Xilinx FPGA) file format? What are those? . Bit. RBT. MCS. Hex. Bin. Exobiology. Tek support?
2. Select the map loaded. Bit file, the header information need to do: D7 it on (according to the V4 configuration manual should be neglected)? (V4 configuration manual ug071: in the initialization complete, packing processor will ignore all of the data appears on the configuration interface, until the arrival of the synchronous word; Xapp502 document mentioned. Bit file contains the header information, this information should not be downloaded into FPGA)
3. Select the map if can load. RBT file, if it is need to manually. RBT files into binary files, and removing text header, guarantee ultimate downloaded to the FPGA is useful to the binary data?
4. (an aside) don't understand. How MCS files from the flash is loaded into the FPGA internal and execution, the document shows that the MCS files are ASCII PROM with address and check and formats of files, then each time the FPGA to electricity from rev, read the data from the flash should be ASCII files, do the FPGA will be converted into their own binaries, and stripping address information and the checksum information?

CodePudding user response:

Also please know, glad to ~

CodePudding user response:

Article 4 say is, in general, the FPGA is a flash plugin, deposit. MCS file, every time on the FPGA will be read from

CodePudding user response:

I used selectmap load bin

CodePudding user response:

references the haoyue sound heart reply: 3/f

I used selectmap load bin

yeah, I said look at the document you want to import the right binary sequence, bin relative to the bit is less a header, and the rest are consistent, so. Bit and. Bin should be ok, but don't know anything can row (for example, RBT cannot directly to send, need to convert the ASCII into binary data sending again?? Don't know if I guess right)