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Anti-static ESD circuit design method is summarized

Time:09-22

1. The structure, reduce the plate and shell of capacitor, the distance is far, whether to have improved, if have, can change the internal structure,
2. Reduce the interference on the ground, based on the characteristics of ac ground can choose ground flat and wide, with a nut with shell surface, at the same time distance appropriate short, so we can improve the ground wire interference,
3. The in-depth analysis to circuit, formed in the corresponding access back to the way capacitance in circuit,

4. (1) PCB edge (including through-hole Via boundary) and the distance between the other wiring should be greater than 0.3 mm;
(2) side of PCB board had better go all in GND line surrounded;
(3) the distance between the GND and other wiring in 0.2 mm to 0.3 mm;
(4) the Vbat and keep the distance between the other wiring in the 0.2 mm to 0.3 mm;
(5) important line, such as Reset, Clock, etc and the distance between the other wiring should be greater than 0.3 mm;
(6) power line and the distance between the other wiring in a 0.2 mm to 0.3 mm;
(7) between different layers of GND should have as much of the hole is connected (VIa);
(8) at the end of the floor should try to avoid sharp corners, have sharp corners should try to make it smooth,
5. (1) will the device be placed near the need to protect the port;
(2) to the GND connection as short as possible;
(3) the GND area as large as possible,
6. And the method of electrostatic protection? ?????
(1) to reduce the accumulation of static electricity, such as FPC or flash memory); ????
(2) make the products insulation, prevent electrostatic happen; ?????
(3)? For sensitive line branch shunt static current; ????
(4) the discharge area of the circuit block; ? ????
(5) reduce the loop area in order to protect the circuit from the effects of magnetic fields produced by electrostatic discharge,

7. (1) power supply using isolation DCDC DCDC have 24 v - & gt; LM2575-5 - & gt; 5 v
(2) to decrease the working frequency of CPU experiment 48 m, 24 m, the effect is almost invisible,
(3) the clock source, reduce RST signal length, package effect good
(4) long IO concatenated magnetic beads, and small zener pressure limiting tube grounding,
(5) MCU without IO configuration for the output
(6) of the metal shell equipment, ground wire cannot directly to the board, the board through the grounding screw in the casing surface, ground wire should meet outside the casing surface, I didn't grounding line on board, but four tin hole and the board is fixed,
All the power of the IC pins and filtering capacitance has been added,
(7) chassis grounding line than the power cord, and reliable connection static test bed datum of copper sheet,

8. Bare copper grounding grid

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