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In the FPGA Aurora64/66 b how to pull up channel_up and lane_up signal

Time:09-26


Why will become red channel_up lane_up signals and lane_up all pull not tall

CodePudding user response:

Channel_up high link between normal (light module to send and receive correctly),
1. This IP core has a lookback parameters, change to IP core in internal back, see if channel_up high,
2. If high change back to lookback parameters, will be the external optical fiber also look at the back,
3. If one does not change the high view bat clock, optical module power supply, instantiated IP core is incorrect.

CodePudding user response:

I also met the channel is not stable, the result is that the hardware pot,
Lane_up and channel_up show that link and the channel is normal,
Loopback can set the loopback test, you can try the loopback, since the loopback of PCS and PMA,
If through the IP case no problem, so the question is on the external link,

CodePudding user response:

The
refer to the original poster weixin_43937087 response:

Why will become red channel_up lane_up signal and lane_up all pull not high

Hello, your problem solved? I also met the same problem with you now,

CodePudding user response:

Hi external light since the loopback is how to do? I'm a plate with two mouth mouth, want to have a light receiving another light mouth lookback how to configure

CodePudding user response:

Hi external light since the loopback is how to do? I'm a plate with two mouth mouth, want to have a light receiving another light mouth lookback how to configure
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