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Time:10-04

How to use stm32f407 control PWM output increase decrease the duty cycle

CodePudding user response:

If you are using a STM32F4xx_StdPeriph_Driver, you can find there are three examples of PWM

/* ** * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * 
* @ file TIM/TIM_7PWMOutput/main c
* @ author MCD Application Team
* @ version V1.8.0
* @ date 04 - November - 2016
* @ brief, the Main program body
* * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * * *
* @ attention
*
* & lt; The h2 & gt;
& Copy; COPYRIGHT 2016 STMicroelectronics

*
* Licensed under MCD - ST Liberty SW License Agreement V2, (the "License");
* You may not use this file except in the compliance with the License.
* You may obtain a copy of the License at:
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/* Includes -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - */
# include "stm32f4xx. H"

/* * @ addtogroup STM32F4xx_StdPeriph_Examples
* @ {
*/

/* * @ addtogroup TIM_7PWM_Output
* @ {
*/

/* Private typedef -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - */
/* Private define -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- */
/* Private macro -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - */
/* Private variables -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - */
TIM_TimeBaseInitTypeDef TIM_TimeBaseStructure;
TIM_OCInitTypeDef TIM_OCInitStructure;
Uint16_t TimerPeriod=0;
Uint16_t Channel1Pulse=0, Channel2Pulse=0, Channel3Pulse=0, Channel4Pulse=0;

/* Private function as -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - */
Void TIM_Config (void);

/* Private functions provides -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - */

/* *
* @ brief, the Main program
* @ param None
* @ retval None
*/
Int main (void)
{
/*! This is done through SystemInit () function which is called from startup
Files (startup_stm32f40_41xxx. S/startup_stm32f427_437xx. S/startup_stm32f429_439xx. S)
Before the to branch to application main.
To reconfigure the default setting of SystemInit () function, refer To
System_stm32f4xx. C the file
*/

/* TIM Configuration */
TIM_Config ();

/* TIM1 Configuration -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- --
7 the Generate PWM signals with 4 company duty cycles:
TIM1 input clock (TIM1CLK) is set to 2 * APB2 clock (PCLK2), since APB2
Prescaler is the company from 1.
TIM1CLK=2 * PCLK2
PCLK2=HCLK/2
=& gt; TIM1CLK=2 * (HCLK/2)=HCLK=SystemCoreClock
TIM1CLK=SystemCoreClock, Prescaler=0, TIM1 counter clock=SystemCoreClock
SystemCoreClock is set to 168 MHz for STM32F4xx devices

The objective is to generate 7 PWM signal at 17.57 KHz:
- TIM1_Period=(SystemCoreClock/17570) - 1
The channel 1 and channel 1 n The duty cycle is set to 50%
The channel 2 and channel 2 n duty cycle is set to 37.5%
The channel 3 and channel 3 n duty cycle is set to 25%
The channel 4 duty cycle is set to 12.5%
The Timer pulse is calculated as follows:
- ChannelxPulse=DutyCycle * (TIM1_Period - 1)/100

Note:
SystemCoreClock variable doesn HCLK frequency and is defined in system_stm32f4xx. C file.
Each time the core clock (HCLK) changes, the user had to call SystemCoreClockUpdate ()
The function to update SystemCoreClock variable value. Otherwise, any configuration
On this variable will be incorrect.
-- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- - */
/* Compute the value to be set in ARR register to generate signal frequency at 17.57 Khz */
TimerPeriod=SystemCoreClock/17570-1;
/* Compute CCR1 value to generate a duty cycle at 50% for channel 1 and 1 n */
Channel1Pulse=(uint16_t) (((uint32_t) 5 * (TimerPeriod - 1))/10);
/* Compute CCR2 value to generate a duty cycle at 37.5% for channel 2 and 2 n */
Channel2Pulse=(uint16_t) (((uint32_t) 375 * (TimerPeriod - 1))/1000);
/* Compute CCR3 value to generate a duty cycle at 25% for channel 3 and 3 n */
Channel3Pulse=(uint16_t) (((uint32_t) 25 * (TimerPeriod - 1))/100);
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