Chinese reference manual that will produce three dma requests, this means that if I set three peripheral to memory the dma channels, then three dma automatically in sequence data to the specified memory? Or a memory to memory dma, transport himself three times? Because of the dma data stream and no triple adc

And the data of three adc are endures adc_cdr register, adc sampling is 16, is a 32-bit registers, how a register of the three adc at the same time collect data

CodePudding user response:

I guess three ADC process should not parallel, to convert a result put ADC_CDR first, then the DMA ADC_CDR the data sent to the SRAM,
Then the second ADC,,,,
Then the third ADC

CodePudding user response:

reference 1st floor dceacho response:

I guess three ADC process should not parallel, to convert a result put ADC_CDR first, then the DMA ADC_CDR the data sent to the SRAM,
Then the second ADC,,,,
Then the third ADC

but you see him this figure, sampling and conversion are at the same time, it's very strange