Figure 1
Above 1 more for no steady-state harmonic oscillation circuit (astable. Asc) spice simulation circuit,


Figure 2

Figure 3
Figure 2 and figure 3 is the circuit under the spice simulation results,

Here no longer to introduce too much harmonic oscillation circuit, analyses the working process of the circuit directly,

On electric moment, the current flow is shown in figure 4, due to the R4 is smaller than R3, so Q2 base current is greater than the base current of Q1, Q2 first enter a state of saturated conductivity, Q2 conduction, C2 by Q2 CE first discharge, then by R3 charging capacitor C2, when Q1 b voltage to charge to the forward bias voltage (0.7 V), Q1 conduction, R4, C1 by CE discharge Q1, Q2 deadline, when, after the completion of C2 discharge C1 via the R4 charging again, after Q2 b is extremely wide, Q2 conduction, C2 discharge, Q1 closing, circuit for circulation, the output pulse,




Figure 4

The calculation of square wave cycle:
According to the properties of charging capacitor and the charging time for t=RC * Ln [(V1 - where V0)/(V1 - Vt)]
As shown in figure 5, in the case of C1, R4=47 k, C1=0.01 UF, where V0=4.3 V, n=0.7 V, V1=5 V, obtained the t1=0.77 * R4 * C1=0.36 ms;
Similarly is t2=0.77 * * R3 C2=1.155 ms;
So the output waveform period T=t1 + t2=1.515 ms,

Figure 5